MMU Side-Channel Attack: Exploiting Last Level Cache Traces to Break ASLR

CVE-2017-5926 · MEDIUM Severity

AV:N/AC:L/AU:N/C:P/I:N/A:N

Page table walks conducted by the MMU during virtual to physical address translation leave a trace in the last level cache of modern AMD processors. By performing a side-channel attack on the MMU operations, it is possible to leak data and code pointers from JavaScript, breaking ASLR.

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