Side-Channel Attack on MMU Operations: Exploiting Last Level Cache in ARM Processors for ASLR Bypass
CVE-2017-5927 · MEDIUM Severity
AV:N/AC:L/AU:N/C:P/I:N/A:N
Page table walks conducted by the MMU during virtual to physical address translation leave a trace in the last level cache of modern ARM processors. By performing a side-channel attack on the MMU operations, it is possible to leak data and code pointers from JavaScript, breaking ASLR.
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